VisualApplets

Realizing Real-time Vision Individually

VisualApplets is the integrated development environment for real-time applications on FPGA-processors in image processing. This solution is used in numerous industrial applications and in a variety of industries. VisualApplets opens up access to FPGA processors in image processing hardware—such as frame grabbers, industrial cameras, and image processing devices—to realize individual image processing applications.

img-prd-vaprc01-375 Design creation by flow chart diagrams

img-prd-vaprc02-375 For small design, you need about 15 min.

img-prd-vaprc03-375 Resource estimation of the design

img-prd-vaprc04-375 Design parameterisation

img-prd-vaprc05-375 High level simulation and preview of visual result

img-prd-vaprc06-375 Bandwidth estimation of the design

img-prd-vaprc07-375 Design rule check performance

img-prd-vaprc08-375 Embedding in SDK project

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Live preview and configuration in microDisplay

The approach of representing FPGA programming by data flow models on a graphical user interface makes it easy for hardware and software developers and application engineers to create applet designs for complex image processing tasks intuitively and in a short period of time — even with no hardware programming experience. All programmed applications are carried out on the FPGA hardware in real-time.

Designs arise from a combination of operators, filter functions, and transport links

In the year of its initial release, VisualApplets was honored with the International Vision Award for 2006 and has enjoyed success ever since.

Silicon Software’s programmable V-Series frame grabbers are pre-licensed for use with VisualApplets. They can be equipped with image processing applications that are executed directly on the frame grabber with high parallelism and minimal latency. Third-party manufacturer Baumer has already made the LX VisualApplets camera series fully compatible with VisualApplets 3.

Graphical FPGA Programming for Real-Time Applications – Your Benefits

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Graphical user interface for simple drag & drop applet design creation Even complex applications for FPGAs can be generated easily using data flow models

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Over 200 operators, grouped in libraries Access to diverse operators to generate applet designs for almost all demands in image processing

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Creation of own libraries for commonly used image processing steps or by importation from available hardware code Flexible development and re-use of needed functions

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Easy porting of applet designs onto other frame grabbers or image processing devices using integrated conversion function Rapid prototyping can be started on a high- performance frame grabber and converted to the most economical platform once design is completed

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“Design Rules Check” automatically checks the conformity of the created applet design against design rules. Possible solutions are offered (visual debugging). Users concentrate on their tasks at hand and need not concern themselves with debugging

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Parameter changes are corrected via inheritance in the overall design Automated applet design adaptation in the event of parameter changes

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Display of the resource consumption of single operators and design elements from the available FPGA logic with every design change Bandwidth analyses indicate bottlenecks in the design that could, for example, be rectified in a graphic configuration by increasing parallelism

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Display of the required transport links’ bandwidth For all links, detailed information on available and required bandwidth is accessible context-sensitively

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Functionality testing of the applet design using high level simulation that calculates the visual interim result at every step with bit precision for visual debugging Easy check of design results by an immediate preview image at every design step to verify created algorithms and image processing steps down to the pixel

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Enables communication and control of cameras and attached peripherals Data signals and connections to external interfaces (peripherals) can be graphically programmed and processed

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SDK output generates operational sample code in C++, including parameters The registers of image processing functionality can be controlled using its own software

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VisualApplets is independent from the target hardware Image processing functions can be implemented independent of the camera manufacturer

Every VisualApplets delivery includes arithmetic and morphological operators for pixel manipulation, logical operators for classification tasks, complex modules for color processing, operators for statistical image analysis, and processing of image sequences, among others. Additional operators are responsible for format conversion, compression or conversion to pixel lists. Special features include control signal programming to individualize trigger functionality as well as segmentation and classification functions in the blob analysis operator.
Read more about the VisualApplets libraries and operators (User Documentation)

Users receive a fast and effective introduction to hardware programming using an expanded offering of sample applications. In Silicon Software’s workshops (and in Stemmer Imaging workshops as well), all essential technical and application-related questions are answered.

Many of our partners and distributors have been certified for VisualApplets. Certification as a VisualApplets Design Center (VADC) enables them to advise customers, provide support, and create applet designs.

For Developers

How you can accelerate your project

icn-prd-cpu-unload FPGA use in machine vision results in an enormous reduction of CPU load. With the rapid development of new sensors, images of higher and higher resolution can be acquired at continually increasing speed. CPUs and even GPUs are no longer able to handle the resulting enormous data quantites. The solution lies in employing FPGAs. Preceding the CPU in the data processing chain, they fulfill a variety of image processing tasks such as image optimization, data interpretation, and control signal creation, thus, the significantly reducing the CPU/GPU load.
icn-prd-user-everyone Since VisualApplets provides a GUI for programming, VHDL knowledge is not required to program FPGAs. Thus, this is no longer a task exclusively for hardware programmers, but can also be accomplished by software developers or machine vision experts.
icn-prd-graph-gui Programming with VisualApplets is accomplished using designing flow charts. The user models the data flow of the individual image processing solution by combining image processing modules (operators) and simply interconnecting transport links using drag-and-drop.
icn-prd-team-ability VisualApplets offers a broad range of teamwork functions. Additionally, members of the project team can communicate their ideas to each other without having to tackle programming language issues.
icn-prd-operators For defining image processing solutions, over 200 operators are available. Each operator offers a specific image processing function within the image processing chain. Operators can be freely combined and linked to accomplish a specific image processing task. They are thematically grouped into 13 libraries.
icn-prd-drc Using the two-level design rules check, the user can verify if the new application conforms to the basic combination and parameterization rules of VisualApplets. Error analysis and debugging are closely intertwined, thus allowing comfortable visual debugging: errors are listed as links, and clicking on an error message leads the user directly to the position where the design shows the reported defect.
icn-prd-resource Detailed estimations and calculations indicate to what extent existing FPGA resources are being used by individual design components and image processing operators. Thus, it is very easy to instantly locate design elements with high resource consumption, so-called ‘hot spots’, and to optimize the design at these spots accordingly.
icn-prd-bandwidth The required bandwidth of each individual transport link is calculated by the program’s data throughput analysis function. Links requiring bandwidth (re)adjustment are highlighted. For all design links, detailed information stating available and required bandwidth is displayed on mouseover.
icn-prd-simulation Pixel-accurate image processing simulation allows testing of the designed application’s functionality. Input modules (for feeding in test images or test image sequences) and output modules (for fetching the calculated visual results) can be placed on any spot in the design.
icn-prd-event With VisualApplets, it is possible to program event control mechanisms on FPGAs. The user can define that events are to be generated by the application in specific situations that might arise on the FPGA during processing. These events are delivered to connected software control by an implemented mechanism in real time, rendering CPU-consuming polling processes unnecessary.
icn-prd-parameter In the process of developing the FPGA design, the user can define which parameters can be modified after the applet’s implementation at run time. These parameters can be (re)set, during run time, by using the SDK or the microDisplay tool, allowing for comfortable, software-based real-time control.
icn-prd-build As soon as a design is ready, an executable FPGA applet can be created via mouse click. In this build process, VisualApplets automatically makes use of the previously installed Xilinx Place&Route software.
icn-prd-imlementation Using the microDisplay configuration and preview program, the user can monitor the FPGA applet’s run time behavior in real time, visually adapt and configure the image processing behavior of the applet, and save the complete system environment to a configuration file.
icn-prd-sdk Together with the FPGA code build, an individual software example is automatically generated to ease implementation into the software application. The parameterizable interfaces are listed and embedded into a programming environment for image acquisition, memory management and image transfer.
icn-prd-mv Functional interfaces to 3rd-party image processing software such as VisionPro® (Cognex), LabVIEW (National Instruments), HALCON (MVTec), CVB (STEMMER IMAGING) and MIL (Matrox) are available – FPGA applications created with VisualApplets can be implemented into almost any conceivable image processing system.

For Decision Makers

How you can make your project a success

icn-prd-t2m With VisualApplets, projects are realized much faster — the graphical, high-level approach makes FPGA programming quick and simple. The resulting hardware code is immediately ready to use in the system. A high-level simulation displays the hardware behavior and helps to minimize integration time. The result is a timely and easy integration into factory automation.
icn-prd-employees Software developers or application engineers can do it — no hardware programming knowledge is required to program FPGAs with VisualApplets. A fast learning curve supports smooth integration in company workflow due to intuitiveness of GUI and design method. A broad range of cross-departmental teamwork functions helps to integrate hardware and software programmers.
icn-prd-roi VisualApplets offers low startup investment costs. FPGA technology guarantees a long product life cycle of developed applications since they can be refined and adjusted by re-programming, thus decreasing maintenance costs. VisualApplets’ modular design concept eases the re-use of designs; high portability enables hardware platform changes in minutes; existing VHDL code can be optionally imported.
icn-prd-ip The design of individually developed image processing solutions is always protected by conversion into binary code.
Unauthorized use of applets can be prevented by restricting the executability of individual applets to certain, pre-defined FPGAs. In these cases, an applet developed by the customer or on behalf of the customer will only run on FPGAs approved by the customer.