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Frame Grabbers for High-speed Applications

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Silicon Software has been designing and producing image acquisition boards and intelligent image processing boards since the 1990s.

FPGA processors form the processing core of these boards. They excel with their highly parallelizable data processing. With its high bandwidths, this technology is preordained for industrial imaging.

Our product portfolio currently covers following product series:

microEnable 5 ironman
microEnable 5 marathon
LightBridge (discontinued)
microEnable IV
microEnable IV


VisualApplets Embedder development | © Silicon Software GmbH

FPGA Development as Innovation Driver

FPGA development has proven itself to be an innovation driver since the mid-1980s, particularly in achieving smaller and smaller line width of the processors. In so doing, in spite of smaller die areas, a greater number of logical cells could be integrated. With more available logic resources and the FPGA performance they provide, today the processor incorporates the interfaces for camera inputs, signal processing, memory port, and data transfer in one FPGA.

Product Concept Taken Further

Silicon Software takes its product concept even further. Frame grabbers have powerful FPGA processors to integrate high-quality image preprocessing functions into the firmware (A series). For programmable frame grabbers (V series), further FPGA resources and larger memory expansion are available for carrying out even complex image processing directly on the frame grabber without loading the CPU. FPGA programming is accomplished using the graphical development environment for FPGAs, VisualApplets.

 

Currently we support following interfaces in our product portfolio:

camera link

The Camera Link standard was initially released in 2000. It is a robust, well-established communications link that standardizes the connection between cameras and frame grabbers and defines a complete interface, including provisions for data transfer, camera timing, serial communications, and real-time signaling to the camera. Camera Link is a non packet-based protocol and remains the simplest camera/frame grabber interconnect standard. Currently in version 2.0, the standard specification includes Mini Camera Link connectors, Power over Camera Link (PoCL), PoCL-Lite (a minimized PoCL interface supporting base configurations) and cable performance specifications.

The standard specification is maintained by Automated Imaging Association.

[text excerpt from Global Machine Vision Interface Standards Brochure, http://www.visiononline.org/vision-standards.cfm, courtesy of AIA, www.visiononline.org] Additional information: http://www.visiononline.org/vision-standards-details.cfm?type=6

camera link hs

The Camera Link HS standard was released in May 2012, improving on Camera Link by using off-the-shelf cables to extend reach and also offering increased bandwidth. Camera Link HS features include: single bit error immune protocols; 16 bidirectional General Purpose Input Output (GPIO) signals; system level functions such as synchronizing multiple parallel processing frame grabber; and frame by frame control of camera operating mode from the host. Camera Link HS is supported at 3.125 Gbits/s per lane with the M protocol and at 10.3 Gbits/s per lane with the X protocol.
Unencrypted VHSIC Hardware Description Language (VHDL) IP cores are available, reducing interconnection issues and development risks when integrating Camera Link HS into original equipment manufacturer (OEM) or custom implementations. Even though Camera Link HS is a packet based protocol, it achieves trigger jitter of 6.4 nanoseconds (ns) using the IP core with typical latencies of 150 ns and GPIO latency and jitters in the 300 ns range.

 

The standard specification is maintained by Automated Imaging Association.

[text excerpt from Global Machine Vision Interface Standards Brochure, http://www.visiononline.org/vision-standards.cfm, courtesy of AIA, www.visiononline.org] Additional information: http://www.visiononline.org/vision-standards-details.cfm?type=10

coaxpress

The CoaXPress (CXP) standard was released in December 2010. It provides a high-speed interface between cameras and frame grabbers and allows long cable lengths. In its simplest form, CoaXPress uses a single coaxial cable to: transmit data from a camera to a frame grabber at up to 6.25 Gbits/s; simultaneously transmit control data and triggers from the frame grabber to the camera at 20.8 Mbits/s; and provide up to 13W of power to the camera. Link aggregation is used when higher speeds are needed, with more than one coaxial cable sharing the data. Version 1.1 allows use of the smaller DIN 1.0/2.3 connector.

The standard specification is maintained by Japan Industrial Imaging Association.

[text excerpt from Global Machine Vision Interface Standards Brochure, http://www.visiononline.org/vision-standards.cfm, courtesy of JIIA, www.jiia.org] Additional information: http://jiia.org/en/standard_dl/coaxpress-wg/

gige vision

The GigE Vision standard is a widely adopted camera interface standard developed using the Ethernet (IEEE 802.3) communication standard. Released in May 2006, the standard was revised in 2010 (version 1.2) and 2011 (version 2.0). GigE Vision supports multiple stream channels and allows for fast error-free image transfer over very long distances using standard Ethernet cables. Hardware and software from different vendors can interoperate seamlessly over Ethernet connections at various data rates. Other Ethernet standards, such as IEEE 1588, are leveraged to provide deterministic triggering.

The standard specification is maintained by Automated Imaging Association.

[text excerpt from Global Machine Vision Interface Standards Brochure, http://www.visiononline.org/vision-standards.cfm, courtesy of AIA, www.visiononline.org]

Additional information: http://www.visiononline.org/vision-standards-details.cfm?type=5

Two Product Series Cover Different Requirements

Silicon Software offers frame grabbers as image acquisition devices (A series) or as image processing devices (V series).
Frame grabbers in the image recording series offer additional preprocessing functions alongside image acquisition, while the those in the image processing series enable programmability for functional individualization.

image acquisition devices (a-series)

A-series frame grabbers are based on the most modern processor technology, which executes image acquisition without loading the CPU, without image loss and with minimal latency. The trigger/GPIO interface offers comprehensive configuration possibilities for scan and line cameras. The integrated preprocessing functions are designed for image improvements (i.e., gamma values, brightness, contrast, but also median noise filtering and shading correction), image reconstruction (i.e. , tap sorting, Bayer CFA color reconstruction, network packet management) and comprehensive format support.

With their FPGA processors and generous on-board memory extension, frame grabbers represent state-of-the-art technology for high-speed and high-resolution imaging.

image processing devices (v-series)

The intelligent frame grabbers in the V series are compatible with VisualApplets programming software. Using these, imaging tasks can be visually programmed and loaded onto the frame grabber. Thereafter, these operating sequences can be carried out highly parallel on the frame grabber with minimal latency. Runtime parameters are controlled via the application software. The imaging devices have use of the comparable A series models’ image acquisition functions, but can be equipped with further additional functions (hardware interfaces) as well.


 

All frame grabber models are listed and described in detail on the Basler website. They can be purchased there.

 

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